| 2025-03-22 | v1.0 | Alvin Young | 首次创建
*
*
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __ES8388_H__
#define __ES8388_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include
#include
#include "imp_codec.h"
/* define --------------------------------------------------------------------*/
/* ES8388 register */
/* chip control and power */
#define ES8388_CONTROL1 0x00
#define ES8388_CONTROL1_DEFAULT_VALUE 0x06
/// @brief reset all reg data to default
#define ES8388_CONTROL1_SET_ALL_RESET(origin, value) \
((origin) & 0x7F | (value) << 7) & 0xFF;
#define ES8388_CONTROL2 0x01
#define ES8388_CONTROL2_DEFAULT_VALUE 0x5C
/// @brief set internal bias?
#define ES8388_CONTROL2_SET_PDN_IBIAS_GEN(origin, value) \
((origin) & 0xFD | (value) << 1) & 0xFF;
#define ES8388_CHIPPOWER 0x02
#define ES8388_CHIPPOWER_DEFAULT_VALUE 0xC3
#define ES8388_ADCPOWER 0x03
#define ES8388_ADCPOWER_DEFAULT_VALUE 0xFC
#define ES8388_DACPOWER 0x04
#define ES8388_DACPOWER_DEFAULT_VALUE 0xC0
#define ES8388_CHIPLOPOW1 0x05
#define ES8388_CHIPLOPOW1_DEFAULT_VALUE 0x00
#define ES8388_CHIPLOPOW2 0x06
#define ES8388_CHIPLOPOW2_DEFAULT_VALUE 0x00
#define ES8388_ANAVOLMANAG 0x07
#define ES8388_ANAVOLMANAG_DEFAULT_VALUE 0x7C
#define ES8388_MASTERMODE 0x08
#define ES8388_MASTERMODE_DEFAULT_VALUE 0x80
/* ADC */
#define ES8388_ADCCONTROL1 0x09
#define ES8388_ADCCONTROL1_DEFAULT_VALUE 0x00
#define ES8388_ADCCONTROL2 0x0a
#define ES8388_ADCCONTROL2_DEFAULT_VALUE 0x00
#define ES8388_ADCCONTROL3 0x0b
#define ES8388_ADCCONTROL3_DEFAULT_VALUE 0x00
#define ES8388_ADCCONTROL4 0x0c
#define ES8388_ADCCONTROL4_DEFAULT_VALUE 0x06
#define ES8388_ADCCONTROL5 0x0d
#define ES8388_ADCCONTROL5_DEFAULT_VALUE 0x30
#define ES8388_ADCCONTROL6 0x0e
#define ES8388_ADCCONTROL6_DEFAULT_VALUE 0x20
#define ES8388_ADCCONTROL7 0x0f
#define ES8388_ADCCONTROL7_DEFAULT_VALUE 0x20
#define ES8388_ADCCONTROL8 0x10
#define ES8388_ADCCONTROL8_DEFAULT_VALUE 0xC0
#define ES8388_ADCCONTROL9 0x11
#define ES8388_ADCCONTROL9_DEFAULT_VALUE 0xC0
#define ES8388_ADCCONTROL10 0x12
#define ES8388_ADCCONTROL10_DEFAULT_VALUE 0x38
#define ES8388_ADCCONTROL11 0x13
#define ES8388_ADCCONTROL11_DEFAULT_VALUE 0xB0
#define ES8388_ADCCONTROL12 0x14
#define ES8388_ADCCONTROL12_DEFAULT_VALUE 0x32
#define ES8388_ADCCONTROL13 0x15
#define ES8388_ADCCONTROL13_DEFAULT_VALUE 0x06
#define ES8388_ADCCONTROL14 0x16
#define ES8388_ADCCONTROL14_DEFAULT_VALUE 0x00
/* DAC */
#define ES8388_DACCONTROL1 0x17
#define ES8388_DACCONTROL1_DEFAULT_VALUE 0x00
#define ES8388_DACCONTROL2 0x18
#define ES8388_DACCONTROL2_DEFAULT_VALUE 0x06
#define ES8388_DACCONTROL3 0x19
#define ES8388_DACCONTROL3_DEFAULT_VALUE 0x22
#define ES8388_DACCONTROL4 0x1a
#define ES8388_DACCONTROL4_DEFAULT_VALUE 0xC0
#define ES8388_DACCONTROL5 0x1b
#define ES8388_DACCONTROL5_DEFAULT_VALUE 0xC0
#define ES8388_DACCONTROL6 0x1c
#define ES8388_DACCONTROL6_DEFAULT_VALUE 0x08
#define ES8388_DACCONTROL7 0x1d
#define ES8388_DACCONTROL7_DEFAULT_VALUE 0x00
#define ES8388_DACCONTROL8 0x1e
#define ES8388_DACCONTROL8_DEFAULT_VALUE 0x1F
#define ES8388_DACCONTROL9 0x1f
#define ES8388_DACCONTROL9_DEFAULT_VALUE 0xF7
#define ES8388_DACCONTROL10 0x20
#define ES8388_DACCONTROL10_DEFAULT_VALUE 0xFD
#define ES8388_DACCONTROL11 0x21
#define ES8388_DACCONTROL11_DEFAULT_VALUE 0xFF
#define ES8388_DACCONTROL12 0x22
#define ES8388_DACCONTROL12_DEFAULT_VALUE 0x1F
#define ES8388_DACCONTROL13 0x23
#define ES8388_DACCONTROL13_DEFAULT_VALUE 0xF7
#define ES8388_DACCONTROL14 0x24
#define ES8388_DACCONTROL14_DEFAULT_VALUE 0xFD
#define ES8388_DACCONTROL15 0x25
#define ES8388_DACCONTROL15_DEFAULT_VALUE 0xFF
#define ES8388_DACCONTROL16 0x26
#define ES8388_DACCONTROL16_DEFAULT_VALUE 0x00
#define ES8388_DACCONTROL17 0x27
#define ES8388_DACCONTROL17_DEFAULT_VALUE 0x38
#define ES8388_DACCONTROL18 0x28
#define ES8388_DACCONTROL18_DEFAULT_VALUE 0x28
#define ES8388_DACCONTROL19 0x29
#define ES8388_DACCONTROL19_DEFAULT_VALUE 0x28
#define ES8388_DACCONTROL20 0x2a
#define ES8388_DACCONTROL20_DEFAULT_VALUE 0x38
#define ES8388_DACCONTROL21 0x2b
#define ES8388_DACCONTROL21_DEFAULT_VALUE 0x00
#define ES8388_DACCONTROL22 0x2c
#define ES8388_DACCONTROL22_DEFAULT_VALUE 0x00
#define ES8388_DACCONTROL23 0x2d
#define ES8388_DACCONTROL23_DEFAULT_VALUE 0x00
#define ES8388_DACCONTROL24 0x2e
#define ES8388_DACCONTROL24_DEFAULT_VALUE 0x00
#define ES8388_DACCONTROL25 0x2f
#define ES8388_DACCONTROL25_DEFAULT_VALUE 0x00
#define ES8388_DACCONTROL26 0x30
#define ES8388_DACCONTROL26_DEFAULT_VALUE 0x00
#define ES8388_DACCONTROL27 0x31
#define ES8388_DACCONTROL27_DEFAULT_VALUE 0x00
#define ES8388_DACCONTROL28 0x32
#define ES8388_DACCONTROL28_DEFAULT_VALUE 0x00
#define ES8388_DACCONTROL29 0x33
#define ES8388_DACCONTROL29_DEFAULT_VALUE 0xAA
#define ES8388_DACCONTROL30 0x34
#define ES8388_DACCONTROL30_DEFAULT_VALUE 0xAA
/* typedef -------------------------------------------------------------------*/
#define CODEC_MEM_CHECK(ptr) \
if (ptr == NULL) { \
ESP_LOGE("ES8388", "Fail to alloc memory at %s:%d", __FUNCTION__, \
__LINE__); \
}
#define BITS(n) (1 << n)
#define MCLK_DEFAULT_DIV (256)
typedef enum
{
BIT_LENGTH_MIN = -1,
BIT_LENGTH_16BITS = 0x03,
BIT_LENGTH_18BITS = 0x02,
BIT_LENGTH_20BITS = 0x01,
BIT_LENGTH_24BITS = 0x00,
BIT_LENGTH_32BITS = 0x04,
BIT_LENGTH_MAX,
} es_bits_length_t;
typedef enum
{
MCLK_DIV_MIN = -1,
MCLK_DIV_1 = 1,
MCLK_DIV_2 = 2,
MCLK_DIV_3 = 3,
MCLK_DIV_4 = 4,
MCLK_DIV_6 = 5,
MCLK_DIV_8 = 6,
MCLK_DIV_9 = 7,
MCLK_DIV_11 = 8,
MCLK_DIV_12 = 9,
MCLK_DIV_16 = 10,
MCLK_DIV_18 = 11,
MCLK_DIV_22 = 12,
MCLK_DIV_24 = 13,
MCLK_DIV_33 = 14,
MCLK_DIV_36 = 15,
MCLK_DIV_44 = 16,
MCLK_DIV_48 = 17,
MCLK_DIV_66 = 18,
MCLK_DIV_72 = 19,
MCLK_DIV_5 = 20,
MCLK_DIV_10 = 21,
MCLK_DIV_15 = 22,
MCLK_DIV_17 = 23,
MCLK_DIV_20 = 24,
MCLK_DIV_25 = 25,
MCLK_DIV_30 = 26,
MCLK_DIV_32 = 27,
MCLK_DIV_34 = 28,
MCLK_DIV_7 = 29,
MCLK_DIV_13 = 30,
MCLK_DIV_14 = 31,
MCLK_DIV_MAX,
} es_sclk_div_t;
typedef enum
{
LCLK_DIV_MIN = -1,
LCLK_DIV_128 = 0,
LCLK_DIV_192 = 1,
LCLK_DIV_256 = 2,
LCLK_DIV_384 = 3,
LCLK_DIV_512 = 4,
LCLK_DIV_576 = 5,
LCLK_DIV_768 = 6,
LCLK_DIV_1024 = 7,
LCLK_DIV_1152 = 8,
LCLK_DIV_1408 = 9,
LCLK_DIV_1536 = 10,
LCLK_DIV_2112 = 11,
LCLK_DIV_2304 = 12,
LCLK_DIV_125 = 16,
LCLK_DIV_136 = 17,
LCLK_DIV_250 = 18,
LCLK_DIV_272 = 19,
LCLK_DIV_375 = 20,
LCLK_DIV_500 = 21,
LCLK_DIV_544 = 22,
LCLK_DIV_750 = 23,
LCLK_DIV_1000 = 24,
LCLK_DIV_1088 = 25,
LCLK_DIV_1496 = 26,
LCLK_DIV_1500 = 27,
LCLK_DIV_MAX,
} es_lclk_div_t;
typedef enum
{
D2SE_PGA_GAIN_MIN = -1,
D2SE_PGA_GAIN_DIS = 0,
D2SE_PGA_GAIN_EN = 1,
D2SE_PGA_GAIN_MAX = 2,
} es_d2se_pga_t;
typedef enum
{
ADC_INPUT_MIN = -1,
ADC_INPUT_LINPUT1_RINPUT1 = 0x00,
ADC_INPUT_MIC1 = 0x05,
ADC_INPUT_MIC2 = 0x06,
ADC_INPUT_LINPUT2_RINPUT2 = 0x50,
ADC_INPUT_DIFFERENCE = 0xf0,
ADC_INPUT_MAX,
} es_adc_input_t;
typedef enum
{
DAC_OUTPUT_MIN = -1,
DAC_OUTPUT_LOUT1 = 0x04,
DAC_OUTPUT_LOUT2 = 0x08,
DAC_OUTPUT_SPK = 0x09,
DAC_OUTPUT_ROUT1 = 0x10,
DAC_OUTPUT_ROUT2 = 0x20,
DAC_OUTPUT_ALL = 0x3c,
DAC_OUTPUT_MAX,
} es_dac_output_t;
typedef enum
{
MIC_GAIN_MIN = -1,
MIC_GAIN_0DB = 0,
MIC_GAIN_3DB = 3,
MIC_GAIN_6DB = 6,
MIC_GAIN_9DB = 9,
MIC_GAIN_12DB = 12,
MIC_GAIN_15DB = 15,
MIC_GAIN_18DB = 18,
MIC_GAIN_21DB = 21,
MIC_GAIN_24DB = 24,
MIC_GAIN_MAX,
} es_mic_gain_t;
typedef enum
{
ES_MODULE_MIN = -1,
ES_MODULE_ADC = 0x01,
ES_MODULE_DAC = 0x02,
ES_MODULE_ADC_DAC = 0x03,
ES_MODULE_LINE = 0x04,
ES_MODULE_MAX
} es_module_t;
typedef enum
{
ES_MODE_MIN = -1,
ES_MODE_SLAVE = 0x00,
ES_MODE_MASTER = 0x01,
ES_MODE_MAX,
} es_mode_t;
typedef enum
{
ES_I2S_MIN = -1,
ES_I2S_NORMAL = 0,
ES_I2S_LEFT = 1,
ES_I2S_RIGHT = 2,
ES_I2S_DSP = 3,
ES_I2S_MAX
} es_i2s_fmt_t;
typedef struct
{
es_sclk_div_t sclk_div; /*!< bits clock divide */
es_lclk_div_t lclk_div; /*!< WS clock divide */
} es_i2s_clock_t;
typedef enum
{
ES_PA_SETUP = 1,
ES_PA_ENABLE = (1 << 1),
ES_PA_DISABLE = (1 << 2),
} es_pa_setting_t;
typedef enum __imp_es_8388_io_port_e__
{
EM_IMP_ES8388_LINE_IN_1 = 0x00,
EM_IMP_ES8388_LINE_IN_2,
EM_IMP_ES8388_LINE_IN_ALL,
EM_IMP_ES8388_LINE_OUT_1,
EM_IMP_ES8388_LINE_OUT_2,
} imp_es_8388_io_port_e;
typedef struct __imp_es8388_cfg_t__
{
uint8_t is_init;
es_mode_t mode;
imp_es_8388_io_port_e dac_output;
imp_es_8388_io_port_e adc_input;
es_i2s_fmt_t fmt;
es_bits_length_t bit;
uint8_t (*read_reg)(uint8_t reg_addr, uint8_t* reg_data);
uint8_t (*write_reg)(uint8_t reg_addr, uint8_t reg_data);
} imp_es8388_cfg_t;
/* variables -----------------------------------------------------------------*/
/* Private function(only *.c) -----------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/**
* @brief Initialize ES8388 codec chip
*
* @param cfg configuration of ES8388
*
* @return
* - ESP_OK
* - ESP_FAIL
*/
int es8388_init(es_mode_t mode, imp_es_8388_io_port_e dac_output,
imp_es_8388_io_port_e adc_input,
uint8_t (*read_reg)(uint8_t reg_addr, uint8_t* reg_data),
uint8_t (*write_reg)(uint8_t reg_addr, uint8_t reg_data));
/**
* @brief Deinitialize ES8388 codec chip
*
* @return
* - ESP_OK
* - ESP_FAIL
*/
int es8388_deinit(void);
/**
* @brief Configure ES8388 I2S format
*
* @param mod: set ADC or DAC or both
* @param cfg: ES8388 I2S format
*
* @return
* - ESP_OK
* - ESP_FAIL
*/
int es8388_config_fmt(es_module_t mod, es_i2s_fmt_t cfg);
/**
* @brief Configure I2s clock in MSATER mode
*
* @param cfg: set bits clock and WS clock
*
* @return
* - ESP_OK
* - ESP_FAIL
*/
int es8388_i2s_config_clock(es_i2s_clock_t cfg);
/**
* @brief Configure ES8388 data sample bits
*
* @param mode: set ADC or DAC or both
* @param bit_per_sample: bit number of per sample
*
* @return
* - ESP_OK
* - ESP_FAIL
*/
int es8388_set_bits_per_sample(es_module_t mode,
es_bits_length_t bit_per_sample);
/**
* @brief Start ES8388 codec chip
*
* @param mode: set ADC or DAC or both
*
* @return
* - ESP_OK
* - ESP_FAIL
*/
int es8388_start(es_module_t mode);
/**
* @brief Stop ES8388 codec chip
*
* @param mode: set ADC or DAC or both
*
* @return
* - ESP_OK
* - ESP_FAIL
*/
int es8388_stop(es_module_t mode);
/**
* @brief Set voice volume
*
* @param volume: voice volume (0~100)
*
* @return
* - ESP_OK
* - ESP_FAIL
*/
int es8388_set_voice_volume(int volume);
/**
* @brief Get voice volume
*
* @param[out] *volume: voice volume (0~100)
*
* @return
* - ESP_OK
* - ESP_FAIL
*/
int es8388_get_voice_volume(int* volume);
/**
* @brief Configure ES8388 DAC mute or not. Basically you can use this function to mute the output or unmute
*
* @param enable enable(1) or disable(0)
*
* @return
* - ESP_FAIL Parameter error
* - ESP_OK Success
*/
int es8388_set_voice_mute(bool enable);
/**
* @brief Get ES8388 DAC mute status
*
* @return
* - ESP_FAIL Parameter error
* - ESP_OK Success
*/
int es8388_get_voice_mute(void);
/**
* @brief Set ES8388 mic gain
*
* @param gain db of mic gain
*
* @return
* - ESP_FAIL Parameter error
* - ESP_OK Success
*/
int es8388_set_mic_gain(es_mic_gain_t gain);
/**
* @brief Set ES8388 adc input mode
*
* @param input adc input mode
*
* @return
* - ESP_FAIL Parameter error
* - ESP_OK Success
*/
int es8388_config_adc_input(es_adc_input_t input);
/**
* @brief Set ES8388 dac output mode
*
* @param output dac output mode
*
* @return
* - ESP_FAIL Parameter error
* - ESP_OK Success
*/
int es8388_config_dac_output(es_dac_output_t output);
/**
* @brief Print all ES8388 registers
*/
void es8388_read_all(void);
/**
* @brief Configure ES8388 codec mode and I2S interface
*
* @param fmt codec fmt
* @param bit I2S bit
*
* @return
* - ESP_FAIL Parameter error
* - ESP_OK Success
*/
int es8388_config_i2s(es_i2s_fmt_t fmt, es_bits_length_t bit);
/**
* @brief Control ES8388 codec chip
*
* @param mode codec mode
* @param start_flag start or stop decode or encode progress
*
* @return
* - ESP_FAIL Parameter error
* - ESP_OK Success
*/
int es8388_ctrl_state(codec_work_mode_t mode, uint8_t start_flag);
/**
* @brief Set ES8388 PA power
*
* @param enable true for enable PA power, false for disable PA power
*
* @return
* - ESP_ERR_INVALID_ARG
* - ESP_OK
*/
int es8388_pa_power(bool enable);
#ifdef __cplusplus
}
#endif
#endif //__ES8388_H__
/*
* EOF
*/ |